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FEATURES
n n n n n n n n n n n
LTC2636 Octal 12-/10-/8-Bit SPI VOUT DACs with10ppm/C Reference DESCRIPTION
The LTC(R)2636 is a family of octal 12-, 10-, and 8-bit voltage-output DACs with an integrated, high-accuracy, low-drift 10ppm/C reference in 14-lead DFN and 16-lead MSOP packages. It has a rail-to-rail output buffer and is guaranteed monotonic. The LTC2636-L has a full-scale output of 2.5V, and operates from a single 2.7V to 5.5V supply. The LTC2636-H has a full-scale output of 4.096V, and operates from a 4.5V to 5.5V supply. Each DAC can also operate with an external reference, which sets the DAC full-scale output to the external reference voltage. These DACs communicate via an SPI/MICROWIRETM-compatible 3-wire serial interface which operates at clock rates up to 50MHz. Hardware clear (CLR) and asynchronous DAC update (LDAC) pins are available in the MSOP package. The LTC2636 incorporates a power-on reset circuit. Options are available for reset to zero-scale or reset to mid-scale in internal reference mode, or reset to mid-scale in external reference mode after power-up.
L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation. SPI/MICROWIRE is a trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners. Protected by U.S. Patents including 5396245, 5859606, 6891433, 6937178, 7414561.
Integrated Precision Reference 2.5V Full-Scale 10ppm/C (LTC2636-L) 4.096V Full-Scale 10ppm/C (LTC2636-H) Maximum INL Error: 2.5LSB (LTC2636-12) Low Noise: 0.75mVP-P 0.1Hz to 200KHz Guaranteed Monotonic Over -40C to 125C Temperature Range Selectable Internal or External Reference 2.7V to 5.5V Supply Range (LTC2636-L) Ultralow Crosstalk Between DACs (<2.4nV*s) Low Power: 0.9mA at 3V (LTC2636-L) Power-On-Reset to Zero-Scale/Mid-Scale Double-Buffered Data Latches Tiny 14-Lead 4mm x 3mm DFN and 16-Lead MSOP Packages Mobile Communications Process Control and Industrial Automation Automatic Test Equipment Portable Equipment Automotive Optical Networking
APPLICATIONS
n n n n n n
BLOCK DIAGRAM
INTERNAL REFERENCE GND REGISTER REGISTER REGISTER REGISTER SWITCH VREF VCC VOUTA VREF REGISTER REGISTER REGISTER REGISTER VOUTB VREF REGISTER REGISTER REGISTER VOUTC VREF REGISTER REGISTER REGISTER VOUTD REGISTER DAC D DAC E REGISTER DAC C DAC F VREF VOUTE DAC B DAC G VREF DAC A DAC H VREF VOUTG INL (LSB) 1 VOUTH 2 REF
12-Bit Integral Nonlinearity (LTC2636-LZ12)
VCC = 3V INTERNAL REF .
0
VOUTF -1
-2
0
1024
2048 CODE
3072
4095
2636 TA01
CS/LD CONTROL LOGIC SCK (LDAC) 32-BIT SHIFT REGISTER POWER-ON RESET
2636 BD
DECODE
SDI
(CLR)
( ) MSOP PACKAGE ONLY
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LTC2636 ABSOLUTE MAXIMUM RATINGS
(Notes 1, 2)
Supply Voltage (VCC) ................................... -0.3V to 6V CS/LD, SCK, SDI, LDAC, CLR....................... -0.3V to 6V VOUT A-VOUT H ..................-0.3V to Min(VCC + 0.3V, 6V) REF ....................................-0.3V to Min(VCC + 0.3V, 6V) Operating Temperature Range LTC2636C ................................................ 0C to 70C LTC2636I.............................................. -40C to 85C LTC2636H (Note 3) ............................ -40C to 125C
Maximum Junction Temperature........................... 150C Storage Temperature Range................... -65C to 150C Lead Temperature (Soldering, 10 sec) MS16-Lead Package ......................................... 300C
PIN CONFIGURATION
TOP VIEW VCC VOUT A VOUT B VOUT C VOUT D CS/LD SCK 1 2 3 4 5 6 7 14 GND 13 VOUT H 12 VOUT G 11 VOUT F 10 VOUT E 9 REF 8 SDI VCC VOUT A VOUT B VOUT C VOUT D LDAC CS/LD SCK 1 2 3 4 5 6 7 8 TOP VIEW 16 15 14 13 12 11 10 9 GND VOUT H VOUT G VOUT F VOUT E REF CLR SDI
DE PACKAGE 14-LEAD (4mm x 3mm) PLASTIC DFN TJMAX = 150C, JA = 37C/W EXPOSED PAD (PIN 15) IS GND, MUST BE SOLDERED TO PCB
MS PACKAGE 16-LEAD (4mm x 5mm) PLASTIC MSOP TJMAX = 150C, JA = 110C/W
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LTC2636 ORDER INFORMATION
LTC2636 C DE -L Z 12 #TR PBF LEAD FREE DESIGNATOR TAPE AND REEL TR = 2500-Piece Tape and Reel RESOLUTION 12 = 12-Bit 10 = 10-Bit 8 = 8-Bit POWER-ON RESET MI = Reset to Mid-Scale in Internal Reference Mode MX = Reset to Mid-Scale in External Reference Mode Z = Reset to Zero-Scale in Internal Reference Mode FULL-SCALE VOLTAGE, INTERNAL REFERENCE MODE L = 2.5V H = 4.096V PACKAGE TYPE DE = 14-Lead DFN MS = 16-Lead MSOP TEMPERATURE GRADE C = Commercial Temperature Range (0C to 70C) I = Industrial Temperature Range (-40C to 85C) H = Automotive Temperature Range (-40C to 125C) PRODUCT PART NUMBER Consult LTC Marketing for information on non-standard lead based finish parts. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
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LTC2636 PRODUCT SELECTION GUIDE
PART MARKING* PART NUMBER LTC2636-LMI12 LTC2636-LMI10 LTC2636-LMI8 LTC2636-LMX12 LTC2636-LMX10 LTC2636-LMX8 LTC2636-LZ12 LTC2636-LZ10 LTC2636-LZ8 LTC2636-HMI12 LTC2636-HMI10 LTC2636-HMI8 LTC2636-HMX12 LTC2636-HMX10 LTC2636-HMX8 LTC2636-HZ12 LTC2636-HZ10 LTC2636-HZ8 DFN LMI12 LMI10 6LMI8 LMX12 LMX10 6LMX8 6LZ12 6LZ10 36LZ8 HMI12 HMI10 6HMI8 HMX12 HMX10 6HMX8 6HZ12 6HZ10 36HZ8 MSOP 6LMI12 6LMI10 36LMI8 VFS WITH INTERNAL REFERENCE 2.5V*(4095/4096) 2.5V*(1023/1024) 2.5V*(255/256) POWER-ON RESET TO CODE Mid-Scale Mid-Scale Mid-Scale Mid-Scale Mid-Scale Mid-Scale Zero-Scale Zero-Scale Zero-Scale Mid-Scale Mid-Scale Mid-Scale Mid-Scale Mid-Scale Mid-Scale Zero-Scale Zero-Scale Zero-Scale POWER-ON REFERENCE MODE Internal Internal Internal External External External Internal Internal Internal Internal Internal Internal External External External Internal Internal Internal RESOLUTION 12-Bit 10-Bit 8-Bit 12-Bit 10-Bit 8-Bit 12-Bit 10-Bit 8-Bit 12-Bit 10-Bit 8-Bit 12-Bit 10-Bit 8-Bit 12-Bit 10-Bit 8-Bit VCC 2.7V-5.5V 2.7V-5.5V 2.7V-5.5V 2.7V-5.5V 2.7V-5.5V 2.7V-5.5V 2.7V-5.5V 2.7V-5.5V 2.7V-5.5V 4.5V-5.5V 4.5V-5.5V 4.5V-5.5V 4.5V-5.5V 4.5V-5.5V 4.5V-5.5V 4.5V-5.5V 4.5V-5.5V 4.5V-5.5V MAXIMUM INL 2.5LSB 1LSB 0.5LSB 2.5LSB 1LSB 0.5LSB 2.5LSB 1LSB 0.5LSB 2.5LSB 1LSB 0.5LSB 2.5LSB 1LSB 0.5LSB 2.5LSB 1LSB 0.5LSB
6LMX12 2.5V*(4095/4096) 6LMX10 2.5V*(1023/1024) 36LMX8 2.5V*(255/256) 36LZ12 36LZ10 636LZ8 6HMI12 6HMI10 36HMI8 2.5V*(4095/4096) 2.5V*(1023/1024) 2.5V*(255/256) 4.096V*(4095/4096) 4.096V*(1023/1024) 4.096V*(255/256)
6HMX12 4.096V*(4095/4096) 6HMX10 4.096V*(1023/1024) 36HMX8 4.096V*(255/256) 36HZ12 36HZ10 636HZ8 4.096V*(4095/4096) 4.096V*(1023/1024) 4.096V*(255/256)
*Above options are available in a 14-lead DFN package (LTC2636-DE) or 16-lead MSOP package (LTC2636-MS).
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LTC2636 ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. VCC = 2.7V to 5.5V, VOUT unloaded unless otherwise specified.
LTC2636-8 SYMBOL PARAMETER DC Performance Resolution Monotonicity DNL INL ZSE VOS VOSTC GE GETC Differential Nonlinearity Integral Nonlinearity Zero-Scale Error Offset Error VOS Temperature Coefficient Gain Error Gain Temperature Coefficient VCC = 3V, Internal Reference (Note 4) VCC = 3V, Internal Reference (Note 4) VCC = 3V, Internal Reference (Note 4) VCC = 3V, Internal Reference, Code = 0 VCC = 3V, Internal Reference (Note 5) VCC =3V, Internal Reference VCC = 3V, Internal Reference VCC = 3V, Internal Reference (Note 10) C-Grade I-Grade H-Grade Internal Reference, Mid-Scale, VCC = 3V10%, -5mA IOUT 5mA VCC = 5V10%, (Note 11) -10mA IOUT 10mA Internal Reference, Mid-Scale, VCC = 3V10%, -5mA IOUT 5mA VCC = 5V10%, (Note 11) -10mA IOUT 10mA
l l l l l l l l l
LTC2636-LMI12/-LMI10/-LMI8/-LMX12/-LMX10/-LMX8/-LZ12/-LZ10/-LZ8 (VFS = 2.5V)
LTC2636-10 LTC2636-12 MAX UNITS Bits Bits 1 1 0.5 0.5 10 0.8 0.2 10 10 10 0.8 2.5 5 5 LSB LSB mV mV V/C %FSR ppm/C ppm/C ppm/C CONDITIONS MIN TYP 8 8 0.5 0.05 0.5 0.5 10 0.2 10 10 10 0.009 0.016 0.009 0.016 0.8 0.5 5 5 0.2 0.5 0.5 10 0.2 10 10 10 0.035 0.064 0.035 0.064 MAX MIN TYP 10 10 0.5 1 5 5 MAX MIN TYP 12 12
Load Regulation
0.14 0.256 LSB/mA 0.14 0.256 LSB/mA
ROUT
DC Output Impedance
l l
0.09 0.09
0.156 0.156
0.09 0.09
0.156 0.156
0.09 0.156 0.09 0.156

SYMBOL VOUT PSR ISC
PARAMETER DAC Output Span Power Supply Rejection Short Circuit Output Current (Note 6) Sinking Sourcing Positive Supply Voltage Supply Current (Note 7)
CONDITIONS External Reference Internal Reference VCC = 3V10% or 5V10% VFS = VCC = 5.5V Zero-Scale; VOUT shorted to VCC Full-Scale; VOUT shorted to GND For Specified Performance VCC = 3V, VREF =2.5V, External Reference VCC = 3V, Internal Reference VCC = 5V, VREF =2.5V, External Reference VCC = 5V, Internal Reference VCC = 5V, C-Grade, I-Grade VCC = 5V, H-Grade
l l l l l l l l l
MIN
TYP 0 to VREF 0 to 2.5 -80 27 -28
MAX
UNITS V V dB
48 -48 5.5
mA mA V mA mA mA mA A A
Power Supply VCC ICC 2.7 0.8 0.9 0.9 1 0.5 0.5 1.1 1.3 1.3 1.5 1.8 5
ISD
Supply Current in Power-Down Mode (Note 7)
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LTC2636 ELECTRICAL CHARACTERISTICS
SYMBOL VREF PARAMETER Input Voltage Range Resistance Capacitance IREF Reference Current, Power-Down Mode Output Voltage Reference Temperature Coefficient Output Impedance Capacitive Load Driving Short Circuit Current Digital I/O VIH VIL ILK CIN tS Digital Input High Voltage Digital Input Low Voltage Digital Input Leakage Digital Input Capacitance Settling Time VCC = 3.6V to 5.5V VCC = 2.7V to 3.6V VCC = 4.5V to 5.5V VCC = 2.7V to 4.5V VIN = GND to VCC (Note 8) VCC = 3V (Note 9) 0.39% (1LSB at 8 Bits) 0.098% (1LSB at 10 Bits) 0.024% (1LSB at 12 Bits)
l l l l l l
The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. VCC = 2.7V to 5.5V, VOUT unloaded unless otherwise specified. LTC2636-LMI12/-LMI10/-LMI8/-LMX12/-LMX10/-LMX8/-LZ12/-LZ10/-LZ8 (VFS = 2.5V)
CONDITIONS
l l l l
MIN 1 120
TYP
MAX VCC
UNITS V k pF A V ppm/C k F mA V V
Reference Input 160 12 DAC Powered Down 0.005 1.24 1.25 10 0.5 10 VCC = 5.5V; REF Shorted to GND 2.4 2.0 0.8 0.6 1 2.5 2.5 0.1 1.26 200
Reference Output
V V A pF
AC Performance 3.4 4.0 4.4 1.0 500 At Mid-Scale Transition 1 DAC held at FS, 1 DAC Switch 0-FS External Reference At f = 1kHz, External Reference At f = 10kHz, External Reference At f = 1kHz, Internal Reference At f = 10kHz, Internal Reference 0.1Hz to 10Hz, External Reference 0.1Hz to 10Hz, Internal Reference 0.1Hz to 200kHz, External Reference 0.1Hz to 200kHz, Internal Reference CREF = 0.1F 2.1 2.1 320 180 160 200 180 35 40 680 730 s s s V/s pF nV*s nV*s kHz nV/Hz nV/Hz nV/Hz nV/Hz VP-P VP-P VP-P VP-P
Voltage Output Slew Rate Capacitive Load Driving Glitch Impulse DAC-to-DAC Crosstalk Multiplying Bandwidth en Output Voltage Noise Density
Output Voltage Noise
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LTC2636 TIMING CHARACTERISTICS
SYMBOL t1 t2 t3 t4 t5 t6 t7 t8 t9 t10 t11 PARAMETER SDI Valid to SCK Setup SDI Valid to SCK Hold SCK High Time SCK Low Time CS/LD Pulse Width LSB SCK High to CS/LD High CS/LD Low to SCK High CLR Pulse Width LDAC Pulse Width CS/LD High to SCK Positive Edge SCK Frequency CS/LD High to LDAC High or Low Transition 50% Duty Cycle
The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. VCC = 2.7V to 5.5V, VOUT unloaded unless otherwise specified.
CONDITIONS
l l l l l l l l l l l l
LTC2636-LMI12/-LMI10/-LMI8/-LMX12/-LMX10/-LMX8/-LZ12/-LZ10/-LZ8 (VFS = 2.5V)
MIN 4 4 9 9 10 7 7 20 15 7 50 200 TYP MAX UNITS ns ns ns ns ns ns ns ns ns ns MHz ns
ELECTRICAL CHARACTERISTICS
SYMBOL PARAMETER DC Performance Resolution Monotonicity DNL INL ZSE VOS VOSTC GE GETC Differential Nonlinearity Integral Nonlinearity Zero-Scale Error Offset Error VOS Temperature Coefficient Gain Error Gain Temperature Coefficient CONDITIONS
The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. VCC = 4.5V to 5.5V, VOUT unloaded unless otherwise specified.
LTC2636-8 MIN
l
LTC2636-HMI12/-HMI10/-HMI8/-HMX12/-HMX10/-HMX8/-HZ12/-HZ10/-HZ8 (VFS = 4.096V)
LTC2636-10 TYP LTC2636-12 MAX UNITS Bits Bits 1 1 0.5 0.5 10 0.8 0.2 10 10 10 0.04 0.09 0.8 2.5 5 5 LSB LSB mV mV V/C %FSR ppm/C ppm/C ppm/C 0.16 LSB/mA TYP MAX MIN 10 10 0.5 0.05 0.5 0.5 10
l
MAX MIN TYP 12 12 0.5
8 8
VCC = 5V, Internal Reference (Note 4) VCC = 5V, Internal Reference (Note 4) VCC = 5V, Internal Reference (Note 4) VCC = 5V, Internal Reference, Code = 0 VCC = 5V, Internal Reference (Note 5) VCC = 5V, Internal Reference VCC = 5V, Internal Reference VCC = 5V, Internal Reference (Note 10) C-Grade I-Grade H-Grade VCC = 5V10%, (Note 11) Internal Reference, Mid-Scale, -10mA IOUT 10mA VCC = 5V10%, (Note 11) Internal Reference, Mid-Scale, -10mA IOUT 10mA
l l l l l
0.5 5 5
0.2 0.5 0.5 10
1 5 5
0.2 10 10 10
0.8
0.2 10 10 10
Load Regulation ROUT DC Output Impedance
l
0.006
0.01
0.022
l
0.09
0.156
0.09
0.156
0.09 0.156
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LTC2636 ELECTRICAL CHARACTERISTICS
SYMBOL VOUT PSR ISC PARAMETER DAC Output Span Power Supply Rejection Short Circuit Output Current (Note 6) Sinking Sourcing Positive Supply Voltage Supply Current (Note 7) Supply Current in Power-Down Mode (Note 7) Input Voltage Range Resistance Capacitance IREF Reference Current, Power-Down Mode Output Voltage Reference Temperature Coefficient Output Impedance Capacitive Load Driving Short Circuit Current Digital I/O VIH VIL ILK CIN tS Digital Input High Voltage Digital Input Low Voltage Digital Input Leakage Digital Input Capacitance Settling Time VIN = GND to VCC (Note 8) VCC = 5V (Note 9) 0.39% (1LSB at 8 Bits) 0.098% (1LSB at 10 Bits) 0.024% (1LSB at 12 Bits)
l l l l
The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. VCC = 4.5V to 5.5V, VOUT unloaded unless otherwise specified.
CONDITIONS External Reference Internal Reference VCC = 5V10% VFS = VCC = 5.5V Zero-Scale; VOUT Shorted to VCC Full-Scale; VOUT Shorted to GND For Specified Performance VCC = 5V, VREF = 4.096V, External Reference VCC = 5V, Internal Reference VCC = 5V, C-Grade, I-Grade VCC = 5V, H-Grade
l l l l l l l l l l l
LTC2636-HMI12/-HMI10/-HMI8/-HMX12/-HMX10/-HMX8/-HZ12/-HZ10/-HZ8 (VFS = 4.096V)
MIN TYP 0 to VREF 0 to 4.096 -80 27 -28 4.5 1.0 1.1 0.5 0.5 1 120 160 12 DAC Powered Down 0.005 2.032 2.048 10 0.5 10 VCC = 5.5V; REF Shorted to GND 2.4 0.8 1 2.5 4 0.1 2.064 48 -48 5.5 1.3 1.5 1.8 5 VCC 200 MAX UNITS V V dB mA mA V mA mA A A V k pF A V ppm/C k F mA V V A pF
Power Supply VCC ICC ISD
Reference Input VREF
Reference Output
AC Performance 3.8 4.3 4.8 1.0 500 At Mid-Scale Transition 1 DAC held at FS, 1 DAC Switch 0-FS External Reference 3.0 2.4 320 s s s V/s pF nV*s nV*s kHz
Voltage Output Slew Rate Capacitive Load Driving Glitch Impulse DAC-to-DAC Crosstalk Multiplying Bandwidth
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LTC2636 ELECTRICAL CHARACTERISTICS
SYMBOL en PARAMETER Output Voltage Noise Density
The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. VCC = 4.5V to 5.5V, VOUT unloaded unless otherwise specified.
CONDITIONS At f = 1kHz, External Reference At f = 10kHz, External Reference At f = 1kHz, Internal Reference At f = 10kHz, Internal Reference 0.1Hz to 10Hz, External Reference 0.1Hz to 10Hz, Internal Reference 0.1Hz to 200kHz, External Reference 0.1Hz to 200kHz, Internal Reference CREF = 0.1F MIN TYP 180 160 250 230 35 50 680 750 MAX UNITS nV/Hz nV/Hz nV/Hz nV/Hz VP-P VP-P VP-P VP-P
LTC2636-HMI12/-HMI10/-HMI8/-HMX12/-HMX10/-HMX8/-HZ12/-HZ10/-HZ8 (VFS = 4.096V)
Output Voltage Noise
TIMING CHARACTERISTICS
SYMBOL t1 t2 t3 t4 t5 t6 t7 t8 t9 t10 t11 PARAMETER SDI Valid to SCK Setup SDI Valid to SCK Hold SCK High Time SCK Low Time CS/LD Pulse Width LSB SCK High to CS/LD High CS/LD Low to SCK High CLR Pulse Width LDAC Pulse Width CS/LD High to SCK Positive Edge SCK Frequency
The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. VCC = 4.5V to 5.5V, VOUT unloaded unless otherwise specified.
CONDITIONS
l l l l l l l l l l l l
LTC2636-HMI12/-HMI10/-HMI8/-HMX12/-HMX10/-HMX8/-HZ12/-HZ10/-HZ8 (VFS = 4.096V)
MIN 4 4 9 9 10 7 7 20 15 7 50 200 TYP MAX UNITS ns ns ns ns ns ns ns ns ns ns MHz ns
50% Duty Cycle
CS/LD High to LDAC High or Low Transition
Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: All voltages are with respect to GND. Note 3: High temperatures degrade operating lifetimes. Operating lifetime is derated at temperatures greater than 105C. Note 4: Linearity and monotonicity are defined from code kL to code 2N-1, where N is the resolution and kL is given by kL = 0.016*(2N/ VFS), rounded to the nearest whole code. For VFS = 2.5V and N = 12, kL = 26 and linearity is defined from code 26 to code 4,095. For VFS = 4.096V and N = 12, kL = 16 and linearity is defined from code 16 to code 4,095.
Note 5: Inferred from measurement at code 16 (LTC2636-12), code 4 (LTC2636-10) or code 1 (LTC2636-8), and at full-scale. Note 6: This IC includes current limiting that is intended to protect the device during momentary overload conditions. Junction temperature can exceed the rated maximum during current limiting. Continuous operation above the specified maximum operating junction temperature may impair device reliability. Note 7: Digital inputs at 0V or VCC. Note 8: Guaranteed by design and not production tested. Note 9: Internal Reference mode. DAC is stepped 1/4 scale to 3/4 scale and 3/4 scale to 1/4 scale. Load is 2k in parallel with 100pF to GND. Note 10: Temperature coefficient is calculated by dividing the maximum change in output voltage by the specified temperature range. Note 11: Thermal resistance of MSOP package limits IOUT to -5mA IOUT 5mA for H-grade MSOP parts and VCC = 5V 10%.
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LTC2636 TYPICAL PERFORMANCE CHARACTERISTICS
TA = 25C, unless otherwise noted. LTC2636-L12 (Internal Reference, VFS = 2.5V) Integral Nonlinearity (INL)
1.0 VCC = 3V 0.5 DNL (LSB) INL (LSB) 0.5 1.0 VCC = 3V
Differential Nonlinearity (DNL)
0
0
-0.5
-0.5
-1.0
0
1024
2048 CODE
3072
4095
2636 G01
-1.0
0
1024
2048 CODE
3072
4095
2636 G02
INL vs Temperature
1.0 VCC = 3V 0.5 INL (LSB) INL (POS) DNL (LSB) 0.5 1.0
DNL vs Temperature
1.260 VCC = 3V 1.255 VREF (V) DNL (POS) 0 DNL (NEG) -0.5 1.245
Reference Output Voltage vs Temperature
VCC = 3V
0 INL (NEG) -0.5
1.250
-1.0 -50 -25
0
25 50 75 100 125 150 TEMPERATURE (C)
2636 G03
-1.0 -50 -25
0
25 50 75 100 125 150 TEMPERATURE (C)
2636 G04
1.240 -50 -25
0
25 50 75 100 125 150 TEMPERATURE (C)
2636 G05
Settling to 1LSB Rising
CS/LD 5V/DIV 3.6s
Settling to 1LSB Falling
3/4 SCALE TO 1/4 SCALE STEP VCC = 3V, VFS = 2.5V RL = 2k, CL = 100pF AVERAGE OF 256 EVENTS
VOUT 1LSB/DIV
4.4s VOUT 1LSB/DIV 1/4 SCALE TO 3/4 SCALE STEP VCC = 3V, VFS = 2.5V RL = 2k, CL = 100pF AVERAGE OF 256 EVENTS 2s/DIV
2636 G06
CS/LD 5V/DIV
2s/DIV
2636 G07
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LTC2636 TYPICAL PERFORMANCE CHARACTERISTICS
TA = 25C, unless otherwise noted. LTC2636-H12 (Internal Reference, VFS = 4.096V) Integral Nonlinearity (INL)
1.0 VCC = 5V 0.5 DNL (LSB) INL (LSB) 0.5 1.0 VCC = 5V
Differential Nonlinearity (DNL)
0
0
-0.5
-0.5
-1.0
0
1024
2048 CODE
3072
4095
2636 G08
-1.0
0
1024
2048 CODE
3072
4095
2636 G09
INL vs Temperature
1.0 VCC = 5V 0.5 INL (LSB) INL (POS) DNL (LSB) 0.5 1.0
DNL vs Temperature
2.068 VCC = 5V 2.058 VREF (V) DNL (POS) 0 DNL (NEG) -0.5 2.038
Reference Output Voltage vs Temperature
VCC = 5V
0 INL (NEG) -0.5
2.048
-1.0 -50 -25
0
25 50 75 100 125 150 TEMPERATURE (C)
2636 G10
-1.0 -50 -25
0
25 50 75 100 125 150 TEMPERATURE (C)
2636 G11
2.028 -50 -25
0
25 50 75 100 125 150 TEMPERATURE (C)
2636 G12
Settling to 1LSB Rising
CS/LD 5V/DIV
Settling to 1LSB Falling
1/4 SCALE TO 3/4 SCALE STEP VCC = 5V, VFS = 4.095V RL = 2k, CL = 100pF AVERAGE OF 256 EVENTS
VOUT 1LSB/DIV 4.0s 4.8s
VOUT 1LSB/DIV
1/4 SCALE TO 3/4 SCALE STEP VCC = 5V, VFS = 4.095V RL = 2k, CL = 100pF AVERAGE OF 256 EVENTS 2s/DIV
2636 G13
CS/LD 5V/DIV
2s/DIV
2636 G14
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LTC2636 TYPICAL PERFORMANCE CHARACTERISTICS
LTC2636-10 Integral Nonlinearity (INL)
1.0 VCC = 3V VFS = 2.5V INTERNAL REF . 0.5 DNL (LSB) INL (LSB) 0.5 1.0 VCC = 3V VFS = 2.5V INTERNAL REF .
TA = 25C, unless otherwise noted.
Differential Nonlinearity (DNL)
0
0
-0.5
-0.5
-1.0
0
256
512 CODE
768
1023
2636 G15
-1.0
0
256
512 CODE
768
1023
2636 G16
LTC2636-8 Integral Nonlinearity (INL)
0.50 VCC = 3V VFS = 2.5V INTERNAL REF . 0.25 DNL (LSB) INL (LSB) 0.25 0.50 VCC = 3V VFS = 2.5V INTERNAL REF .
Differential Nonlinearity (DNL)
0
0
-0.25
-0.25
-0.50
0
64
128 CODE
192
255
2636 G17
-0.50
0
64
128 CODE
192
255
2636 G18
LTC2636 Load Regulation
10 8 6 4 VOUT (mV) VOUT (V) 2 0 -2 -4 -6 -8 -10 -30 -20 -10 INTERNAL REF. CODE = MIDSCALE 0 10 IOUT (mA) 20 30
2636 G19
Current Limiting
0.20 3 VCC = 5V (LTC2636-H) VCC = 5V (LTC2636-L) VCC = 3V (LTC2636-L) OFFSET ERROR (mV) INTERNAL REF. CODE = MIDSCALE -20 -10 0 10 IOUT (mA) 20 30
2636 G20
Offset Error vs Temperature
VCC = 5V (LTC2636-H) VCC = 5V (LTC2636-L) VCC = 3V (LTC2636-L)
0.15 0.10 0.05 0 -0.05 -0.01 -0.15
2 1 0 -1 -2 -3 -50 -25
-0.20 -30
0
25 50 75 100 125 150 TEMPERATURE (C)
2636 G21
2636f
12
LTC2636 TYPICAL PERFORMANCE CHARACTERISTICS
LTC2636 Large-Signal Response Mid-Scale Glitch Impulse Power-On Reset Glitch
LTC2636-L
TA = 25C, unless otherwise noted.
CS/LD 5V/DIV VOUT 0.5V/DIV VOUT 5mV/DIV VFS = VCC = 5V 1/4 SCALE to 3/4 SCALE 2s/DIV
2636 G22
VCC 2V/DIV LTC2636-H12, VCC = 5V 3.0nV*s TYP VOUT 5mV/DIV LTC2636-L12, VCC = 3V 2.1nV*s TYP 2s/DIV
2636 G23
ZERO-SCALE
200s/DIV
2636 G24
Headroom at Rails vs Output Current
5.0 4.5 4.0 3.5 VOUT (V) 3.0 2.5 2.0 1.5 1.0 0.5 0 0 3V (LTC2636-L) SINKING 1 2 3 456 IOUT (mA) 7 8 9 10 5V SINKING 3V (LTC2636-L) SOURCING CS/LD 2V/DIV 5V SOURCING
Exiting Power-Down to Mid-Scale
LTC2636-H VCC = 5V INTERNAL REF . VCC 2V/DIV
Power-On Reset to Mid-Scale
LTC2636-H
DACs A-G IN VOUT POWER-DOWN MODE 0.5V/DIV
VOUT 0.5V/DIV
LTC2636-L
5s/DIV
2636 G26
200s/DIV
2636 G27
2636 G25
Supply Current vs Logic Voltage
1.5 SWEEP SCK, SDI, CS/LD BETWEEN 0V AND VCC VOUT 1V/DIV ICC (mA) 1.2 VCC = 5V 1.0 VCC = 3V (LTC2636-L) CLR 5V/DIV
Hardware CLR
VCC = 5V VREF = 4.096V CODE = FULL-SCALE VOUT 1V/DIV
Hardware CLR to Mid-Scale
VCC = 5V VREF = 4.096V CODE = FULL-SCALE
1.4
0.8
CLR 5V/DIV
0.6
0
1
2 3 LOGIC VOLTAGE (V)
4
5
2636 G28
1s/DIV
2636 G29
1s/DIV
2636 G30
2636f
13
LTC2636 TYPICAL PERFORMANCE CHARACTERISTICS
LTC2636 Multiplying Bandwidth
2 0 NOISE VOLTAGE (nV/Hz) -2 -4 -6 dB -8 -10 -12 -14 -16 -18 1k VCC = 5V VREF(DC) = 2V VREF(AC) = 0.2VP-P CODE = FULL-SCALE 10k 100k FREQUENCY (Hz) 1M
2636 G31
TA = 25C, unless otherwise noted.
Noise Voltage vs Frequency
500 VCC = 5V CODE = MID-SCALE INTERNAL REF .
400
300 LTC2636-H 200 LTC2636-L 100
0 100
1k
100k 10k FREQUENCY (Hz)
1M
2636 G32
Gain Error vs Reference Input
1.0 VCC = 5.5V 0.8 GAIN ERROR OF 8 CHANNELS 0.6 GAIN ERROR (%FSR) 0.4 0.2 0 -0.2 -0.4 -0.6 -0.8 -1.0 1 1.5 2 2.5 3 3.5 4 4.5 REFERENCE VOLTAGE (V) 5 5.5 10V/DIV
0.1Hz to 10Hz Voltage Noise
VCC = 5V, VFS = 2.5V CODE = MIDSCALE INTERNAL REF .
1s/DIV
2636 G34
2636 G33
DAC to DAC Crosstalk (Dynamic)
1.0
Gain Error vs Temperature
1 DAC SWITCH 0-FS 2V/DIV VOUT 1mV/DIV
GAIN ERROR (%FSR) LTC2636-H12, VCC = 5V 2.4nV*s TYP CREF = 0.1F 2s/DIV
2636 G35
CS/LD 5V/DIV
0.5
0
-0.5
-1.0 -50 -25
0
25 50 75 100 125 150 TEMPERATURE (C)
2636 G36
2636f
14
LTC2636 PIN FUNCTIONS
(DFN/MSOP)
VCC (Pin 1/1): Supply Voltage Input. 2.7V VCC 5.5V (LTC2636-L) or 4.5V VCC 5.5V (LTC2636-H). Bypass to GND with a 0.1F capacitor. VOUT A to VOUT H (Pins 2-5, 10-13/2-5, 12-15): DAC Analog Voltage Outputs. CS/LD (Pin 6/7): Serial Interface Chip Select/Load Input. When CS/LD is low, SCK is enabled for shifting data on SDI into the register. When CS/LD is taken high, SCK is disabled and the specified command (see Table 1) is executed. SCK (Pin 7/8): Serial Interface Clock Input. CMOS and TTL compatible. SDI (Pin 8/9): Serial Interface Data Input. Data on SDI is clocked into the DAC on the rising edge of SCK. The LTC2636 accepts input word lengths of either 24 or 32 bits. REF (Pin 9/11): Reference Voltage Input or Output. When External Reference mode is selected, REF is an input (1V VREF VCC) where the voltage supplied sets the full-scale DAC output voltage. When Internal Reference is selected, the 10ppm/C 1.25V (LTC2636-L) or 2.048V (LTC2636-H) internal reference (half full-scale) is available at REF. This output may be bypassed to GND with up to 10F and must be buffered when driving external , DC load current.
GND (Pin 14/16): Ground. LDAC (Pin 6, MSOP only): Asynchronous DAC Update Pin. If CS/LD is high, a falling edge on LDAC immediately updates the DAC registers with the contents of the input registers (similar to a software update). If CS/LD is low when LDAC goes low, the DAC registers are updated after CS/LD returns high. A low on the LDAC pin powers up the DACs. A software power down command is ignored if LDAC is low. If the LDAC functionality is not being used, the LDAC pin should be tied high. CLR (Pin 10, MSOP only): Asynchronous Clear Input. A logic low at this level-triggered input clears all registers and causes the DAC voltage output to reset to Zero (LTC2636-Z) or Mid-scale (LTC2636-MI/-MX). CMOS and TTL compatible. Exposed Pad (Pin 15, DFN Only): Ground. Must be soldered to PCB Ground.
2636f
15
LTC2636 BLOCK DIAGRAM
INTERNAL REFERENCE GND REGISTER REGISTER REGISTER REGISTER SWITCH VREF VCC VOUTA VREF REGISTER REGISTER REGISTER VOUTB VREF REGISTER REGISTER REGISTER VOUTC VREF REGISTER REGISTER REGISTER VOUTD REGISTER DAC D DAC E REGISTER DAC C DAC F VREF VOUTE DAC B REGISTER DAC G VREF DAC A DAC H VREF VOUTG VOUTH REF
VOUTF
CS/LD CONTROL LOGIC SCK (LDAC) 32-BIT SHIFT REGISTER POWER-ON RESET
2636 BD
DECODE
SDI
(CLR)
( ) MSOP PACKAGE ONLY
TIMING DIAGRAMS
t1 t2 SCK 1 t3 2 t4 3 23 t6 24 t10 SDI t5 CS/LD t11 LDAC
2636 F01a
t7
t9
Figure 1a
CS/LD t11 LDAC
2636 F01b
Figure 1b
2636f
16
LTC2636 OPERATION
The LTC2636 is a family of octal voltage output DACs in 14-lead DFN and 16-lead MSOP packages. Each DAC can operate rail-to-rail using an external reference, or with its full-scale voltage set by an integrated reference. Eighteen combinations of accuracy (12-, 10-, and 8-bit), power-on reset value (zero-scale, mid-scale in internal reference mode, or mid-scale in external reference mode), and full-scale voltage (2.5V or 4.096V) are available. The LTC2636 is controlled using a 3-wire SPI/MICROWIRE compatible interface. Power-On Reset The LTC2636-HZ/-LZ clear the output to zero-scale when power is first applied, making system initialization consistent and repeatable. For some applications, downstream circuits are active during DAC power-up, and may be sensitive to nonzero outputs from the DAC during this time. The LTC2636 contains circuitry to reduce the power-on glitch: the analog output typically rises less than 5mV above zeroscale during power on. In general, the glitch amplitude decreases as the power supply ramp time is increased. See "Power-On Reset Glitch" in the Typical Performance Characteristics section. The LTC2636-HMI/-HMX/-LMI/-LMX provide an alternative reset, setting the output to mid-scale when power is first applied. The LTC2636-LMI and LTC2636-HMI power up in internal reference mode, with the output set to a mid-scale voltage of 1.25V and 2.048V respectively. The LTC2636-LMX and LTC2636-HMX power-up in external reference mode, with the output set to mid-scale of the external reference. Default reference mode selection is described in the Reference Modes section. Power Supply Sequencing The voltage at REF (Pin 9-DFN, Pin 11-MSOP) must be kept within the range -0.3V VREF VCC + 0.3V (see Absolute Maximum Ratings). Particular care should be taken to observe these limits during power supply turnon and turn-off sequences, when the voltage at VCC is in transition. Transfer Function The digital-to-analog transfer function is k VOUT(IDEAL) = n VREF 2 where k is the decimal equivalent of the binary DAC input code, n is the resolution, and VREF is either 2.5V (LTC2636LMI/-LMX/-LZ) or 4.096V (LTC2636-HMI/-HMX/-HZ) when in Internal Reference mode, and the voltage at REF when in External Reference mode.
Table 1. Command Codes
COMMAND* C3 0 0 0 0 0 0 0 0 1 C2 0 0 0 0 1 1 1 1 1 C1 0 0 1 1 0 0 1 1 1 C0 0 1 0 1 0 1 0 1 1 Write to Input Register n Update (Power-Up) DAC Register n Write to Input Register n, Update (Power-Up) All Write to and Update (Power-Up) DAC Register n Power-Down DAC n Power-Down Chip (All DAC's and Reference) Select Internal Reference (Power-Up Reference) Select External Reference (Power-Down Internal Reference) No Operation
*Command codes not shown are reserved and should not be used.
Table 2. Address Codes
ADDRESS (n)* A3 0 0 0 0 0 0 0 0 1 A2 0 0 0 0 1 1 1 1 1 A1 0 0 1 1 0 0 1 1 1 A0 0 1 0 1 0 1 0 1 1 DAC A DAC B DAC C DAC D DAC E DAC F DAC G DAC H All DACs
* Address codes not shown are reserved and should not be used.
2636f
17
LTC2636 OPERATION
INPUT WORD (LTC2636-12) COMMAND C3 C2 C1 C0 A3 ADDRESS A2 A1 A0 D11 D10 MSB INPUT WORD (LTC2636-10) COMMAND C3 C2 C1 C0 A3 ADDRESS A2 A1 A0 D9 MSB INPUT WORD (LTC2636-8) COMMAND C3 C2 C1 C0 A3 ADDRESS A2 A1 A0 D7 MSB D6 D5 D4 D3 DATA (8 BITS + 8 DON'T-CARE BITS) D2 D1 D0 LSB X X X X X X X X
2636 F02
DATA (12 BITS + 4 DON'T-CARE BITS) D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 LSB X X X X
DATA (10 BITS + 6 DON'T-CARE BITS) D8 D7 D6 D5 D4 D3 D2 D1 D0 LSB X X X X X X
Figure 2. Command and Data Input Format
Serial Interface The CS/LD input is level triggered. When this input is taken low, it acts as a chip-select signal, enabling the SDI and SCK buffers and the input shift register. Data (SDI input) is transferred into the LTC2636 on the next 24 rising SCK edges. The 4-bit command, C3-C0, is loaded first; then the 4-bit DAC address, A3-A0; and finally the 16-bit data word. The data word comprises the 12-, 10- or 8-bit input code, ordered MSB-to-LSB, followed by 4, 6 or 8 don't-care bits (LTC2636-12, -10 and -8 respectively; see Figure 2). Data can only be transferred to the device when the CS/LD signal is low, beginning on the first rising edge of SCK. SCK may be high or low at the falling edge of CS/LD. The rising edge of CS/LD ends the data transfer and causes the device to execute the command specified in the 24-bit input sequence. The complete sequence is shown in Figure 3a. The command (C3-C0) and address (A3-A0) assignments are shown in Tables 1 and 2. The first four commands in Table 1 consist of write and update operations. A Write operation loads a 16-bit data word from the 24-bit shift register into the input register of the selected DAC, n. An Update operation copies the data word from the input register to the DAC register. Once copied into the DAC register, the data word becomes the active 12-, 10-, or 8-bit input code, and is converted to an analog voltage at the DAC output. Write to and Update combines the first two commands. The Update operation also powers up the
DAC if it had been in power-down mode. The data path and registers are shown in the Block Diagram. While the minimum input sequence is 24 bits, it may optionally be extended to 32 bits to accommodate microprocessors that have a minimum word width of 16 bits (2 bytes). To use the 32-bit width, 8 don't-care bits must be transferred to the device first, followed by the 24-bit sequence described. Figure 3b shows the 32-bit sequence. The 16-bit data word is ignored for all commands that do not include a Write operation. Reference Modes For applications where an accurate external reference is either not available, or not desirable due to limited space, the LTC2636 has a user-selectable, integrated reference. The integrated reference voltage is internally amplified by 2x to provide the full-scale DAC output voltage range. The LTC2636-LMI/-LMX/-LZ provides a full-scale DAC output of 2.5V. The LTC2636-HMI/-HMX/-HZ provides a full-scale DAC output of 4.096V. The internal reference can be useful in applications where the supply voltage is poorly regulated. Internal Reference mode can be selected by using command 0110b, and is the power-on default for LTC2636-HZ/-LZ, as well as for LTC2636-HMI/-LMI. The 10ppm/C, 1.25V (LTC2636-LMI/-LMX/-LZ) or 2.048V (LTC2636-HMI/-HMX/-HZ) internal reference is available
2636f
18
OPERATION
CS/LD 1 2 7 13 14 17 D3 D2 D1 D0 X X X X
2636 F03a
SCK 3 4 10 21 23 D10 DATA WORD D9 D8 D7 D6 D5 D4 11 12 18 24 16 20 22 C0 ADDRESS A3 A2 A1 A0 D11 5 6 8 9 19 15 C1 C3 COMMAND WORD C2
SDI
24-BIT INPUT WORD
Figure 3a. LTC2636-12 24-Bit Load Sequence (Minimum Input Word). LTC2636-10 SDI Data Word: 10-Bit Input Code + 6 Don't-Care Bits; LTC2636-8 SDI Data Word: 8-Bit Input Code + 8 Don't-Care Bits
CS/LD 6 7 13 14 17 D11 D10 A2 ADDRESS A1 A0 A3 X COMMAND WORD X C3 C2 C1 C0 8 9 10 11 12 18 16 15 X 19 D9 20 D8 21 D7 22 D6 23 D5 24 D4 25 D3 DATA WORD
2636 F03b
SCK
1
2
3
4
5
26 D2
27 D1
28 D0
29 X
30 X
31 X
32 X
SDI
X
X
X
X
X
8 DON'T-CARE BITS
32-BIT INPUT WORD
Figure 3b. LTC2636-12 32-Bit Load Sequence. LTC2636-10 SDI Data Word: 10-Bit Input Code + 6 Don't-Care Bits; LTC2636-8 SDI Data Word: 8-Bit Input Code + 8 Don't-Care Bits
LTC2636
19
2636f
LTC2636 OPERATION
at the REF pin. Adding bypass capacitance to the REF pin will improve noise performance; and up to 10F can be driven without oscillation. The REF output must be buffered when driving an external DC load current. Alternatively, the DAC can operate in External Reference mode using command 0111b. In this mode, an input voltage supplied externally to the REF pin provides the reference (1V VREF VCC) and the supply current is reduced. The external reference voltage supplied sets the full-scale DAC output voltage. External Reference mode is the power-on default for LTC2636-HMX/-LMX. The reference mode of LTC2636-HZ/-LZ/-HMI/-LMI (Internal Reference power-on default), can be changed by software command after power-up. The same is true for LTC2636-HMX/-LMX (External Reference power-on default). Power-Down Mode For power-constrained applications, power-down mode can be used to reduce the supply current whenever less than eight DAC outputs are needed. When in power-down, the buffer amplifiers, bias circuits, and integrated reference circuits are disabled, and draw essentially zero current. The DAC outputs are put into a high-impedance state, and the output pins are passively pulled to ground through individual 200k resistors. Input- and DAC-register contents are not disturbed during power-down. Any DAC channel or combination of channels can be put into power-down mode by using command 0100b in combination with the appropriate DAC address, (n). The supply current is reduced approximately 10% for each DAC powered down. The integrated reference is automatically powered down when external reference is selected using command 0111b. In addition, all the DAC channels and the integrated reference together can be put into powerdown mode using Power Down Chip command 0101b. When the integrated reference and all DAC channels are in power-down mode, the REF pin becomes high impedance (typically > 1G). For all power-down commands the 16-bit data word is ignored. Normal operation resumes after executing any command that includes a DAC update, (as shown in Table 1) or using the asynchronous LDAC pin. The selected DAC is powered up as its voltage output is updated. When a DAC which is in a powered-down state is powered up and updated, normal settling is delayed. If less than eight DACs are in a powered-down state prior to the update command, the power-up delay time is 10s. However, if all eight DACs and the integrated reference are powered down, then the main bias generation circuit block has been automatically shut down in addition to the DAC amplifiers and reference buffers. In this case, the power up delay time is 12s. The power-up of the integrated reference depends on the command that powered it down. If the reference is powered down using the Select External Reference Command (0111b), then it can only be powered back up using Select Internal Reference Command (0110b). However, if the reference was powered down using Power Down Chip Command (0101b), then in addition to Select Internal Reference Command (0110b), any command (in software or using the LDAC pin) that powers up the DACs will also power up the integrated reference. Voltage Outputs The LTC2636's integrated rail-to-rail amplifiers have guaranteed load regulation when sourcing or sinking up to 10mA at 5V, and 5mA at 3V. Load regulation is a measure of the amplifier's ability to maintain the rated voltage accuracy over a wide range of load current. The measured change in output voltage per change in forced load current is expressed in LSB/mA. DC output impedance is equivalent to load regulation, and may be derived from it by simply calculating a change in units from LSB/mA to ohms. The amplifier's DC output impedance is 0.1 when driving a load well away from the rails. When drawing a load current from either rail, the output voltage headroom with respect to that rail is limited by the 50 typical channel resistance of the output devices (e.g., when sinking 1mA, the minimum output voltage is 50 * 1mA, or 50mV). See the graph "Headroom at Rails vs. Output Current" in the Typical Performance Characteristics section. The amplifier is stable driving capacitive loads of up to 500pF .
2636f
20
LTC2636 OPERATION
VREF = VCC POSITIVE FSE
VREF = VCC OUTPUT VOLTAGE OUTPUT VOLTAGE INPUT CODE (c) 0V 0 2,048 INPUT CODE (a) INPUT CODE (b) 4,095
2636 F04
OUTPUT VOLTAGE
0V NEGATIVE OFFSET
Figure 4. Effects of Rail-to-Rail Operation On a DAC Transfer Curve (Shown for 12 Bits). (a) Overall Transfer Function (b) Effect of Negative Offset for Codes Near Zero (c) Effect of Positive Full-Scale Error for Codes Near Full-Scale
Rail-to-Rail Output Considerations In any rail-to-rail voltage output device, the output is limited to voltages within the supply range. Since the analog output of the DAC cannot go below ground, it may limit for the lowest codes as shown in Figure 4b. Similarly, limiting can occur near full-scale when the REF pin is tied to VCC. If VREF = VCC and the DAC full-scale error (FSE) is positive, the output for the highest codes limits at VCC, as shown in Figure 4c. No full-scale limiting can occur if VREF is less than VCC -FSE. Offset and linearity are defined and tested over the region of the DAC transfer function where no output limiting can occur. Board Layout The PC board should have separate areas for the analog and digital sections of the circuit. A single, solid ground plane should be used, with analog and digital signals carefully routed over separate areas of the plane. This keeps digital signals away from sensitive analog signals and minimizes the interaction between digital ground currents and the analog section of the ground plane. The resistance from
the LTC2636 GND pin to the ground plane should be as low as possible. Resistance here will add directly to the effective DC output impedance of the device (typically 0.1). Note that the LTC2636 is no more susceptible to this effect than any other parts of this type; on the contrary, it allows layout-based performance improvements to shine rather than limiting attainable performance with excessive internal resistance. Another technique for minimizing errors is to use a separate power ground return trace on another board layer. The trace should run between the point where the power supply is connected to the board and the DAC ground pin. Thus the DAC ground pin becomes the common point for analog ground, digital ground, and power ground. When the LTC2636 is sinking large currents, this current flows out the ground pin and directly to the power ground trace without affecting the analog ground plane voltage. It is sometimes necessary to interrupt the ground plane to confine digital ground currents to the digital portion of the plane. When doing this, make the gap in the plane only as long as it needs to be to serve its purpose and ensure that no traces cross over the gap.
2636f
21
LTC2636 PACKAGE DESCRIPTION
DE Package 14-Lead (4mm x 3mm) Plastic DFN
(Reference LTC DWG # 05-08-1708 Rev B)
0.70 0.05 3.60 0.05 2.20 0.05 3.30 0.05 1.70 0.05 PACKAGE OUTLINE 0.25 0.05 0.50 BSC 3.00 REF RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
4.00 0.10 (2 SIDES) R = 0.05 TYP 3.00 0.10 (2 SIDES) PIN 1 TOP MARK (SEE NOTE 6)
R = 0.115 TYP 8 14
0.40 0.10
3.30 0.10 1.70 0.10 PIN 1 NOTCH R = 0.20 OR 0.35 x 45 CHAMFER
(DE14) DFN 0806 REV B
7 0.200 REF 0.75 0.05 3.00 REF 0.00 - 0.05
1 0.25 0.05 0.50 BSC
BOTTOM VIEW--EXPOSED PAD
NOTE: 1. DRAWING PROPOSED TO BE MADE VARIATION OF VERSION (WGED-3) IN JEDEC PACKAGE OUTLINE MO-229 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE
2636f
22
LTC2636 PACKAGE DESCRIPTION
MS Package 16-Lead (4mm x 5mm) Plastic MSOP
(Reference LTC DWG # 05-08-1669 Rev O)
0.889 0.127 (.035 .005)
5.23 (.206) MIN
3.20 - 3.45 (.126 - .136)
0.305 0.038 (.0120 .0015) TYP
0.50 (.0197) BSC
4.039 0.102 (.159 .004) (NOTE 3) 16151413121110 9
RECOMMENDED SOLDER PAD LAYOUT
0.280 0.076 (.011 .003) REF
0.254 (.010) GAUGE PLANE
DETAIL "A" 0 - 6 TYP
4.90 0.152 (.193 .006)
3.00 0.102 (.118 .004) (NOTE 4)
0.53 0.152 (.021 .006) DETAIL "A" 0.18 (.007) SEATING PLANE
12345678 1.10 (.043) MAX
0.86 (.034) REF
NOTE: 1. DIMENSIONS IN MILLIMETER/(INCH) 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
0.17 -0.27 (.007 - .011) TYP
0.50 (.0197) BSC
0.1016 0.0508 (.004 .002)
MSOP (MS16) 1107 REV O
2636f
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
23
LTC2636 TYPICAL APPLICATION
LTC2636 DACs Adjust LTC2755-16 Offsets, Amplified with LT1991 PGA to 5V
5V 15 15V 0.1F VDD LTC2755-16 RFBA 60 15V 5V 0.1F
61 ROFSA 64 RIN1 63 RCOM1 DAC A
0.1F 8 7
+ -
1/2 LT1469 6 4 0.1F -15V OUTD
62 REFA
RVOSA 58 -15V
DAC D 3 30k 12
30k -15V -15V OUTC 30k DAC C DAC B
30k GND -15V
19 SERIAL BUS
RELATED PARTS
PART NUMBER LTC1660/LTC1665 LTC1664 LTC2600/LTC2610/ LTC2620 LTC2601/LTC2611/ LTC2621 LTC2602/LTC2612/ LTC2622 LTC2604/LTC2614/ LTC2624 LTC2605/LTC2615/ LTC2625 LTC2606/LTC2616/ LTC2626 LTC2609/LTC2619/ LTC2629 LTC2630 LTC2631 LTC2640 DESCRIPTION Octal 10/8-Bit VOUT DACs in 16-Pin Narrow SSOP Quad 10-Bit VOUT DAC in 16-Pin Narrow SSOP Octal 16-/14-/12-Bit VOUT DACs in 16-Lead Narrow SSOP Single 16-/14-/12-Bit VOUT DACs in 10-Lead DFN Dual 16-/14-/12-Bit VOUT DACs in 8-Lead MSOP Quad 16-/14-/12-Bit VOUT DACs in 16-Lead SSOP Octal 16-/14-/12-Bit VOUT DACs with I2C Interface Single 16-/14-/12-Bit VOUT DACs with I2C Interface Quad 16-/14-/12-Bit VOUT DACs with I2C Interface Single 12-/10-/8-Bit VOUT DACs with 10ppm/C Reference in SC70 Single 12-/10-/8-Bit I2C VOUT DACs with 10ppm/C Reference in ThinSOT Single 12-/10-/8-Bit VOUT DACs with 10ppm/C Reference in ThinSOT COMMENTS VCC = 2.7V to 5.5V, Micropower, Rail-to-Rail Output VCC = 2.7V to 5.5V, Micropower, Rail-to-Rail Output 250A per DAC, 2.5V to 5.5V Supply Range, Rail-to-Rail Output, SPI Serial Interface 300A per DAC, 2.5V to 5.5V Supply Range, Rail-to-Rail Output, SPI Serial Interface 300A per DAC, 2.5V to 5.5V Supply Range, Rail-to-Rail Output, SPI Serial Interface 250A per DAC, 2.5V to 5.5V Supply Range, Rail-to-Rail Output, SPI Serial Interface 250A per DAC, 2.7V to 5.5V Supply Range, Rail-to-Rail Output, I2C Interface 270A per DAC, 2.7V to 5.5V Supply Range, Rail-to-Rail Output, I2C Interface 250A per DAC, 2.7V to 5.5V Supply Range, Rail-to-Rail Output with Separate VREF Pins for Each DAC 180A per DAC, 2.7V to 5.5V Supply Range, 10ppm/C Reference, Rail-to-Rail Output, SPI Interface 180A per DAC, 2.7V to 5.5V Supply Range, 10ppm/C Reference, Selectable External Ref. Mode, Rail-to-Rail Output, I2C Interface 180A per DAC, 2.7V to 5.5V Supply Range, 10ppm/C Reference, Selectable External Ref. Mode, Rail-to-Rail Output, SPI Interface
2636f
24 Linear Technology Corporation
(408) 432-1900 FAX: (408) 434-0507
1630 McCarthy Blvd., Milpitas, CA 95035-7417
www.linear.com
(c) LINEAR TECHNOLOGY CORPORATION 2008
+
IOUT2A 2
3
-
5
IOUT1A 59
2
8 1 OUTA
2k
0.1F 15V
1/2 LT1469 4
1k 9 0.1F 0.1F 2 REF LTC2636DE-LMI12 DAC A DAC H 13 VCC 1 0.1F 8 M9 9 M3 10 M1 1 P1 2 P3 3 P9 7 VCC LT1991 REF VEE 5 4
0.1F
OUT
6
VOUT = 5V
+ -
+ - + -
DAC B
DAC G
0.1F -15V
4
DAC C
DAC F
11
OUTB
-15V 5 10
DAC D
DAC E
6 CS/LD 7 SCK 8 SDI
GND
2636 TA02
14
LT 1108 * PRINTED IN USA

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Price & Availability of LTC2636CDE-LMX10

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